With the growing popularization of touch control display devices, people's requirement on quality of the touch control display devices becomes higher and higher. The in-cell touch technology has been widely used for its advantages of reduced thickness and high touch sensitivity and the like.
The in-cell touch technology, i.e., the touch control element, is integrated in the display panel, so that the panel itself has the touch function, and the touch effect and application can be achieved without fitting and assembling with the touch panel additionally. Taking the typical thin film transistor-liquid crystal display (TFT-LCD) as the example, its characteristic is that the manufacture of the touch sensing element is accomplished in the standard manufacturing process of the TFT-LCD, since it does not need to arrange a touch panel additionally, the problem of fitting and alignment does not exist, the weight and the thickness are also reduced significantly, the product will be lighter and thinner. Since the in-cell technology is adopted, the display device product does not need frames, the total plane design can be achieved, the design of the product is also more concise and the application field is wider.
The current in-cell touch technology generally uses the projection type multi-point capacitive touch control mode, the touch control signals thereof are collected through two layers of signal lines, one layer of signal lines thereof are driving lines (Tx lines), the other layer of signal lines serve as sensing lines (Rx lines), the two layers of lines are perpendicular to each other. In the way of implementation, the scanning mode is used to drive each driving line, and the sensing line that intersects with this driving line is measured whether capacitive coupling phenomenon occurs at a certain point. The accurate touch point position can be obtained by scanning one by one, and multi-point touch control can be achieved.
For the current touch control display device, when the pixels and the scanning lines located in the same line or column are charged simultaneously, mutual interference may occur, so the processes of pixel charging and scanning are generally performed separately. Specifically, there are generally two timing modes of V-Blank and H-Blank within one frame. The V-Blank mode means that after all the pixels are charged within one frame, a period of time is left for performing touch control signal scanning, i.e., the pixel charging and the touch control scanning are performed separately. Such a mode can only support the touch control scanning refresh rate which is the same as the display screen refresh rate (in a relationship of 1:1). If the screen refresh rate is 60 HZ, the touch control scanning refresh rate can only be 60 HZ. In order to improve touch sensitivity, increasing the frequency of the touch control scanning is the key, when pursuing experience effect of high performance touch control, the touch refresh rate of 120 HZ and above is necessary.
Whereas the H-Blank mode can increase the touch control scanning refresh rate effectively, this mode preserves a period of time for performing partial touch signal scanning within one frame in the interval of charging a certain number of lines of pixels, i.e., the pixel charging and the touch control scanning are performed alternately, such a mode can support the touch control scanning refresh rate to be larger than the screen refresh rate, i.e., in multiple relationship with the screen refresh rate. The in-cell touch control scanning timing using the H-Blank mode to realize twice of the display refresh frequency may be as shown in FIG. 1, by dividing the display scanning into two sections equally, after the end of each section, the operation of pixel scanning GOA (Gate Drive on Array) circuit is paused, a scanning (Tx scanning) is performed to all the touch control sensing lines, therefore, within one display scanning, the touch control scanning can be accomplished twice, a touch control scanning that is twice of the display refresh frequency can be achieve.
The conventional GOA circuit generally comprises a plurality of cascaded shift register units, the structure thereof may be as shown in FIG. 2, wherein each shift register unit is connected with a shift register unit in the neighboring row respectively, each shift register unit corresponds to a row of gate lines, the shift register unit of each row may perform pre-charging to the shift register unit of the next row at the same time of outputting the gate driving signal, so as to ensure the shift register unit of the next row realize output in the next clock period. In the prior art, as shown in FIG. 3, the shift register unit takes the simplest 4T1C structure as the example. When the H-Blank timing scanning as shown in FIG. 1 is performed, the N/2+1 row of shift register unit is the very beginning row of the second ½ display scanning, but its pull-up control PU node has been charged as a high level when the N/2 row provides an output. Since a relatively long scanning time exists between the outputs of the N/2 row and the N/2+1 row, electric leakage may occur to the potential of the PU point through the connected TFT, thereby affecting the pre-charging of the shift register unit of the N/2+1 row seriously, such that the voltage will be reduced when the shift register unit of the N/2+1 row performs output, thereby resulting in insufficient charging rate of the pixels of this row, and the defect of dark or bright line may occur.